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? 1996 mos integrated circuit m m PD23C32082L 32m-bit mask programmable rom 2m-word by 16-bit (word mode) / 1m-word by 32-bit (double word mode) page access mode preliminary data sheet the mark ? ? shows major revised points. document no. m12267ej4v0ds00 (4th edition) date published february 1998 ns cp (k) printed in japan the information in this document is subject to change without notice. description the m PD23C32082L is a 33,554,432 bits mask-programmable rom. the word organization is selectable (word mode : 2,097,152 words by 16 bits, double word mode : 1,048,576 words by 32 bits). the active levels of oe (output enable input) can be selected with mask-option. the m PD23C32082L are packed in 70-pin plastic ssop. features word organization 2,097,152 words by 16 bits (word mode) 1,048,576 words by 32 bits (double word mode) page access mode double word mode : 8 double words random page access word mode : 16 words random page access operating supply voltage : 3.3 v 0.3 v operating supply voltage access time / page access time power supply current standby current v cc ns (max.) (active mode) (cmos level input) ma (max.) m a (max.) 3.3 v 0.3 v 100 / 30 80 30 ordering information part number package m PD23C32082Lg7-xxx 70-pin plastic ssop (500 mil) (xxx : rom c ode suffix no.) h h
preliminary data sheet 2 m m PD23C32082L pin configuration (marking side) /xxx indicates active low si gnal. 70-pin plastic ssop (500 mil) [ m PD23C32082Lg7 ] a0 a1 a2 a3 a4 a5 v cc o0 o16 o1 o17 gnd v cc o2 o18 o3 o19 o4 o20 o5 o21 gnd v cc o6 o22 o7 o23 gnd a6 a7 a8 a9 a10 a11 a12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 nc nc nc dw, / w /oe, oe, dc /ce gnd o31, a-1 o15 o30 o14 gnd v cc o29 o13 o28 o12 o27 o11 o26 o10 gnd v cc o25 o9 o24 o8 v cc a19 a18 a17 a16 a15 a14 a13 h
preliminary data sheet 3 m m PD23C32082L pin name a0 - a19 : address inputs o0 - o15, o16 - o30 : data outputs o31, a - 1 : data 31 output (double word mode), lsb address input (word mode) dw, /w : mode select /ce : chip enable /oe, oe : output enable v cc : supply voltage gnd : ground nc note : no connection dc : don't care note some signals can be applied because this pin is not connected to the inside of the chip.
preliminary data sheet 4 m m PD23C32082L input / output pin functions pin name input / output function dw, /w input the pin for switching double word mode and word mode. high level : double word mode (1m words by 32 bits) low level : word mode (2m words by 16 bits) a0 to a19 (address inputs) output address bus. a0 to a19 are used differently in the double word mode and the word mode. double word mode (1m words by 32 bits) a0 to a19 are used as 20 bits address signals. word mode (2m words by 16 bits) a0 to a19 are used as the upper 20 bits of total 21 bits of address signal. (the least significant bit (a - 1) is combined to o31.) o0 to o15, o16 to o30 (data output) output output data bus. o0 to o15, o16 to o30 are used differently in the double word mode and the word mode. double word mode (1m words by 32 bits) the lower 31 bits of 32 bits data outputs to o0 to o30. (the most significant bit (o31) combined to a - 1.) word mode (2m words by 16 bits) 16 bits data outputs to o0 to o15 and also o16 to o30 is high impedance. o31, a - 1 (data output 31, lsb address input) input, output o31, a - 1 are used differently in the double word mode and the word mode. double word mode (1m words by 32 bits) the most significant output data bus (o31). word mode (2m words by 16 bits) the least significant address bus (a - 1). /ce (chip enable) input chip activating signal. when the oe is active, output states are following. high level : high impedance low level : data out /oe, oe, dc (output enable) input output enable signal. the active level of oe is mask option. the active level of oe can be selected from high active, low active and don't care at order. v cc supply voltage gnd ground nc not internally connected (the signal can be connected).
preliminary data sheet 5 m m PD23C32082L block diagram a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 a16 a17 a18 a19 o31, aC1 dw, / w /oe, oe, dc /ce output buffer y-selector memory cell matrix 1,048,576 words by 32 bits / 2,097,152 words by 16 bits address input buffer x-decoder logic / input input buffer y-decoder o15 o0 o16 o30
preliminary data sheet 6 m m PD23C32082L mask option the active levels of output enable pin (/oe, oe, dc) are mask programmable and optional, and can be selected from among 0, 1, shown in the table below. option /oe, oe, dc oe active level 0/oel 1oeh dc dont care operation modes for each option are shown in the tables below. operation mode (option : 0) /ce /oe mode output state l l active data out h high impedance h h or l standby high impedance operation mode (option : 1) /ce /oe mode output state l l active high impedance h data out h h or l standby high impedance operation mode (option : ) /ce dc mode output state l h or l active data out h h or l standby high impedance remark l : low level input h : high level input
preliminary data sheet 7 m m PD23C32082L electrical specifications absolute maximum ratings parameter symbol condition rating unit supply voltage v cc C0.3 to +4.6 v input voltage v i C0.3 to v cc + 0.3 v output voltage v o C0.3 to v cc + 0.3 v operating ambient temperature t a C10 to +70 c storage temperature t stg C65 to +150 c caution exposing the device to stress above those listed in absolute maximum ratings could cause permanent damage. the device is not meant to be operated under conditions outside the limits described in the operational section of this specification. exposure to absolute maximum rating conditions for extended periods may affect device reliability. capacitance (t a = 25 c) parameter symbol test condition min. typ. max. unit input capacitance c i f = 1 mhz 10 pf output capacitance c o 12 pf dc characteristics (t a = - 10 to +70 c, v cc = 3.3 v 0.3 v) parameter symbol test condition min. typ. max. unit high level input voltage v ih 2.0 v cc + 0.3 v low level input voltage v il C0.3 +0.8 v high level output voltage v oh i oh = C400 m a2.4 v low level output voltage v ol i ol = 2.1 ma 0.4 v input leakage current i li v i = 0 v to v cc C10 +10 m a output leakage current i lo v o = 0 v to v cc , chip deselected C10 +10 m a power supply current i cc1 /ce = v il (active mode), i o = 0 ma 80 ma standby current i cc2 /ce = v ih (standby mode) 1.5 ma i cc3 /ce = v cc C 0.2 v (standby mode) 30 m a
preliminary data sheet 8 m m PD23C32082L ac characteristics (t a = - 10 to +70 c, v cc = 3.3 v 0.3 v) parameter symbol test condition min. typ. max. unit address access time t acc 100 ns page access time t pac 30 ns chip enable access time t ce 100 ns output enable access time t oe 30 ns output hold time t oh 0ns output disable time t df 025ns double word, word access time t cbw 100 ns remark t df is the time from inactivation of /ce or /oe, oe to high-impedance state output. ac test conditions input waveform (rise / fall time 5 ns) output waveform output load 1 ttl + 100 pf h h h h test points 1.4 v 1.4 v test points 1.4 v 1.4 v
preliminary data sheet 9 m m PD23C32082L read cycle timing chart 1 notes 1. during double word mode, a - 1 is o31. 2. t df is specified when one of /ce, /oe, oe is inactivated. 3. during word mode, o16 to o30 are high impedance and o31 is a - 1. a0 to a19, aC1 note 1 (input) o0 to o15, note 3 o16 to o31 (output) /ce (input) /oe, oe (input) t acc t ce t oe t df note 2 t oh data out high impedance
preliminary data sheet 10 m m PD23C32082L read cycle timing chart 2 (page access mode) notes 1. during double word mode, a - 1 is o31. 2. t df is specified when one of /ce, /oe, oe is inactivated. 3. during word mode, o16 to o30 are high impedance and o31 is a - 1. 4. the definitions of page access time is as follows. page access time upper address (a3 to a19) /ce input condition /oe, oe input condition inputs condition t pac before t acc - t pac before t ce - t pac before stabilizing of page address (a - 1, a0, a1, a2) a3 to a19 (input) /ce (input) /oe, oe (input) t acc data 0 t ce t oe t pac note 4 t pac note 4 o0 to o15, note 3 o16 to o31 a0, a1, a2 note 1 (double word mode) aC1, a0, a1, a2 (word mode) (input) (output) data 1 data 7 high impedance high impedance t oh t oh t oh t df note 2
preliminary data sheet 11 m m PD23C32082L double word mode, /word mode switching timing chart remark /oe, oe and /ce : active data out aC1 (input) dw, / w (input) invalid data out data out high impedance o0 to o15 (output) o16 to o31 (output) t oh t acc t oh t wb data out data out t df valid input invalid
preliminary data sheet 12 m m PD23C32082L package drawing 70 pin plastic shrink sop (500 mil) note each lead centerline is located within 0.10 mm (0.004 inch) of its true position (t.p.) at maximum material conditions. item millimeters inches p70g7-80-500a b detail of lead end a h 15.90.3 0.6260.012 n l m 0.10 0.004 n 0.10 0.004 g f j 0.8 0.031 c 0.8 (t.p.) 0.031 (t.p.) d 0.32 0.013 +0.003 C0.004 e 0.10.05 0.0040.002 f 3.0 max. 0.119 max. i 12.70.1 0.5000.004 j 1.60.2 0.0630.008 p r 0.25 0.010 3 +5 C3 3 +0.08 C0.07 +5 C3 135 70 36 m r p e l h i k a a' b c d m s 28.87 max. 1.137 0.89 max. 0.035 k 0.22 0.0090.001 +0.025 C0.015 s 0.880.15 0.035 +0.006 C0.007 a' 28.570.1 1.125 +0.004 C0.005 g 2.70.15 0.106 +0.007 C0.006 h
preliminary data sheet 13 m m PD23C32082L recommended soldering conditions please consult with our sales offices for soldering conditions of the m PD23C32082L. types of surface mount device m PD23C32082Lg7 : 70-pin plastic ssop (500 mil) h
preliminary data sheet 14 m m PD23C32082L [ memo ]
preliminary data sheet 15 m m PD23C32082L 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos device behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. produc- tion process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed imme-diately after power-on for devices having reset function. notes for cmos devices
m m PD23C32082L [memo] the export of this product from japan is regulated by the japanese government. to export this product may be prohibited without governmental license, the need for which must be judged by the customer. the export or re-export of this product from a country other than japan may also be prohibited without a license from that country. please call an nec sales representative. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 96. 5

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